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3G TS 25.213 V4.2.0 (2001-12)
Technical Specification
3rd Generation Partnership Project;
Technical Specification Group Radio Access Network;
Spreading and modulation (FDD)
(Release 4)
The present document has been developed within the 3rd Generation Partnership Project (3GPP TM) and may be further elaborated for the purposes of 3GPP.
The present document has not been subject to any approval process by the 3GPP Organisational Partners and shall not be implemented.
This Specification is provided for future development work within 3GPP only. The Organisational Partners accept no liability for any use of this Specification.
Specifications and reports for implementation of the 3GPP TM system should be obtained via the 3GPP Organisational Partners’ Publications Offices.
3GPP
Release 4 2 3G TS 25.213 V4.2.0 (2001-12)
Keywords
UMTS, radio, modulation, layer 1
3GPP
Postal address
3GPP support office address
650 Route des Lucioles – Sophia Antipolis
Valbonne – FRANCE
Tel.: +33 4 92 94 42 00 Fax: +33 4 93 65 47 16
Internet
http://www.3gpp.org
Copyright Notification
No part may be reproduced except as authorized by written permission.
The copyright and the foregoing restriction extend to reproduction in all media.
? 2001, 3GPP Organizational Partners (ARIB, CWTS, ETSI, T1, TTA,TTC).
All rights reserved.
3GPP
Release 4 3 3G TS 25.213 V4.2.0 (2001-12)
Contents
Foreword………………………………………………………………………………………………………………………………………….5
1 Scope……………………………………………………………………………………………………………………………………..6
2 References………………………………………………………………………………………………………………………………6
3 Symbols and abbreviations………………………………………………………………………………………………………..6
3.1 Symbols………………………………………………………………………………………………………………………………………………. 6
3.2 Abbreviations ………………………………………………………………………………………………………………………………………. 6
4 Uplink spreading and modulation ………………………………………………………………………………………………7
4.1 Overview …………………………………………………………………………………………………………………………………………….. 7
4.2 Spreading…………………………………………………………………………………………………………………………………………….. 7
4.2.1 DPCCH/DPDCH …………………………………………………………………………………………………………………………….. 7
4.2.2 PRACH………………………………………………………………………………………………………………………………………….. 9
4.2.2.1 PRACH preamble part……………………………………………………………………………………………………………………… 9
4.2.2.2 PRACH message part ………………………………………………………………………………………………………………………. 9
4.2.3 PCPCH…………………………………………………………………………………………………………………………………………… 9
4.2.3.1 PCPCH preamble part………………………………………………………………………………………………………………………. 9
4.2.3.2 PCPCH message part……………………………………………………………………………………………………………………….. 9
4.3 Code generation and allocation …………………………………………………………………………………………………………….. 10
4.3.1 Channelization codes……………………………………………………………………………………………………………………… 10
4.3.1.1 Code definition ……………………………………………………………………………………………………………………………… 10
4.3.1.2 Code allocation for DPCCH/DPDCH……………………………………………………………………………………………….. 11
4.3.1.3 Code allocation for PRACH message part…………………………………………………………………………………………. 11
4.3.1.4 Code allocation for PCPCH message part …………………………………………………………………………………………. 11
4.3.1.5 Channelisation code for PCPCH power control preamble…………………………………………………………………… 12
4.3.2 Scrambling codes…………………………………………………………………………………………………………………………… 12
4.3.2.1 General…………………………………………………………………………………………………………………………………………. 12
4.3.2.2 Long scrambling sequence………………………………………………………………………………………………………………. 12
4.3.2.3 Short scrambling sequence ……………………………………………………………………………………………………………… 13
4.3.2.4 DPCCH/DPDCH scrambling code …………………………………………………………………………………………………… 14
4.3.2.5 PRACH message part scrambling code …………………………………………………………………………………………….. 14
4.3.2.6 PCPCH message part scrambling code ……………………………………………………………………………………………… 15
4.3.2.7 PCPCH power control preamble scrambling code………………………………………………………………………………. 15
4.3.3 PRACH preamble codes…………………………………………………………………………………………………………………. 15
4.3.3.1 Preamble code construction …………………………………………………………………………………………………………….. 15
4.3.3.2 Preamble scrambling code ………………………………………………………………………………………………………………. 15
4.3.3.3 Preamble signature…………………………………………………………………………………………………………………………. 16
4.3.4 PCPCH preamble codes………………………………………………………………………………………………………………….. 16
4.3.4.1 Access preamble ……………………………………………………………………………………………………………………………. 16
4.3.4.1.1 Access preamble code construction …………………………………………………………………………………………….. 16
4.3.4.1.2 Access preamble scrambling code ………………………………………………………………………………………………. 16
4.3.4.1.3 Access preamble signature …………………………………………………………………………………………………………. 17
4.3.4.2 CD preamble…………………………………………………………………………………………………………………………………. 17
4.3.4.2.1 CD preamble code construction ………………………………………………………………………………………………….. 17
4.3.4.2.2 CD preamble scrambling code ……………………………………………………………………………………………………. 17
4.3.4.2.3 CD preamble signature………………………………………………………………………………………………………………. 17
4.4 Modulation ………………………………………………………………………………………………………………………………………… 18
4.4.1 Modulating chip rate………………………………………………………………………………………………………………………. 18
4.4.2 Modulation……………………………………………………………………………………………………………………………………. 18
5 Downlink spreading and modulation ………………………………………………………………………………………..18
5.1 Spreading…………………………………………………………………………………………………………………………………………… 18
5.2 Code generation and allocation …………………………………………………………………………………………………………….. 19
5.2.1 Channelization codes……………………………………………………………………………………………………………………… 19
5.2.2 Scrambling code ……………………………………………………………………………………………………………………………. 20
5.2.3 Synchronisation codes ……………………………………………………………………………………………………………………. 21
5.2.3.1 Code generation …………………………………………………………………………………………………………………………….. 21
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Release 4 4 3G TS 25.213 V4.2.0 (2001-12)
5.2.3.2 Code allocation of SSC…………………………………………………………………………………………………………………… 22
5.3 Modulation ………………………………………………………………………………………………………………………………………… 24
5.3.1 Modulating chip rate………………………………………………………………………………………………………………………. 24
5.3.2 Modulation……………………………………………………………………………………………………………………………………. 24
Annex A (informative): Generalised Hierarchical Golay Sequences………………………………………….25
A.1 Alternative generation…………………………………………………………………………………………………………….25
Annex B (informative): Change history …………………………………………………………………………………..26
3GPP
Release 4 5 3G TS 25.213 V4.2.0 (2001-12)
Foreword
This Technical Specification (TS) has been produced by the 3rd Generation Partnership Project (3GPP).
The contents of the present document are subject to continuing work within the TSG and may change following formal
TSG approval. Should the TSG modify the contents of the present document, it will be re-released by the TSG with an
identifying change of release date and an increase in version number as follows:
Version x.y.z
where:
x the first digit:
1 presented to TSG for information;
2 presented to TSG for approval;
3 or greater indicates TSG approved document under change control.
y the second digit is incremented for all changes of substance, i.e. technical enhancements, corrections,
updates, etc.
z the third digit is incremented when editorial only changes have been incorporated in the document.
3GPP
Release 4 6 3G TS 25.213 V4.2.0 (2001-12)
1 Scope
The present document describes spreading and modulation for UTRA Physical Layer FDD mode.
2 References
The following documents contain provisions which, through reference in this text, constitute provisions of the present
document.
? References are either specific (identified by date of publication, edition number, version number, etc.) or
non-specific.
? For a specific reference, subsequent revisions do not apply.
? For a non-specific reference, the latest version applies. In the case of a reference to a 3GPP document (including
a GSM document), a non-specific reference implicitly refers to the latest version of that document in the same
Release as the present document.
[1] 3GPP TS 25.201: “Physical layer – general description”.
[2] 3GPP TS 25.211: “Physical channels and mapping of transport channels onto physical channels
(FDD).”
[3] 3GPP TS 25.101: “UE Radio transmission and Reception (FDD)”.
[4] 3GPP TS 25.104: “UTRA (BS) FDD; Radio transmission and Reception”.
3 Symbols and abbreviations
3.1 Symbols
For the purposes of the present document, the following symbols apply:
Cch,SF,n: n:th channelisation code with spreading factor SF
Cpre,n,s: PRACH preamble code for n:th preamble scrambling code and signature s
Cc-acc,n,s: PCPCH access preamble code for n:th preamble scrambling code and signature s
Cc-cd,n,s: PCPCH CD preamble code for n:th preamble scrambling code and signature s
Csig,s: PRACH/PCPCH signature code for signature s
Sdpch,n: n:th DPCCH/DPDCH uplink scrambling code
Sr-pre,n: n:th PRACH preamble scrambling code
Sr-msg,n: n:th PRACH message scrambling code
Sc-acc: n:th PCPCH access preamble scrambling code
Sc-cd: n:th PCPCH CD preamble scrambling code
Sc-msg,n: n:th PCPCH message scrambling code
Sdl,n: DL scrambling code
Cpsc: PSC code
Cssc,n: n:th SSC code
3.2 Abbreviations
For the purposes of the present document, the following abbreviations apply:
AICH Acquisition Indicator Channel
AP Access Preamble
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Release 4 7 3G TS 25.213 V4.2.0 (2001-12)
BCH Broadcast Control Channel
CCPCH Common Control Physical Channel
CD Collision Detection
CPCH Common Packet Channel
CPICH Common Pilot Channel
DCH Dedicated Channel
DPCH Dedicated Physical Channel
DPCCH Dedicated Physical Control Channel
DPDCH Dedicated Physical Data Channel
FDD Frequency Division Duplex
Mcps Mega Chip Per Second
OVSF Orthogonal Variable Spreading Factor (codes)
PDSCH Physical Dedicated Shared Channel
PICH Page Indication Channel
PRACH Physical Random Access Channel
PSC Primary Synchronisation Code
RACH Random Access Channel
SCH Synchronisation Channel
SSC Secondary Synchronisation Code
SF Spreading Factor
UE User Equipment
4 Uplink spreading and modulation
4.1 Overview
Spreading is applied to the physical channels. It consists of two operations. The first is the channelization operation,
which transforms every data symbol into a number of chips, thus increasing the bandwidth of the signal. The number of
chips per data symbol is called the Spreading Factor (SF). The second operation is the scrambling operation, where a
scrambling code is applied to the spread signal.
With the channelization, data symbols on so-called I- and Q-branches are independently multiplied with an OVSF code.
With the scrambling operation, the resultant signals on the I- and Q-branches are further multiplied by complex-valued
scrambling code, where I and Q denote real and imaginary parts, respectively.
4.2 Spreading
4.2.1 DPCCH/DPDCH
Figure 1 illustrates the principle of the uplink spreading of DPCCH and DPDCHs. The binary DPCCH and DPDCHs to
be spread are represented by real-valued sequences, i.e. the binary value “0” is mapped to the real value +1, while the
binary value “1” is mapped to the real value –1. The DPCCH is spread to the chip rate by the channelization code cc
,
while the n:th DPDCH called DPDCHn is spread to the chip rate by the channelization code cd,n. One DPCCH and up to
six parallel DPDCHs can be transmitted simultaneously, i.e. 1 ? n ? 6.
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Release 4 8 3G TS 25.213 V4.2.0 (2001-12)
I
?
j
cd,1 ?d
Sdpch,n
I+jQ
DPDCH1
Q
cd,3 ?d
DPDCH3
cd,5 ?d
DPDCH5
cd,2 ?d
DPDCH2
cd,4 ?d
DPDCH4
cd,6 ?d
DPDCH6
cc ?c
DPCCH
?
S
Figure 1: Spreading for uplink DPCCH and DPDCHs
After channelization, the real-valued spread signals are weighted by gain factors, ?c for DPCCH and??d for all
DPDCHs.
At every instant in time, at least one of the values ?c and ?d has the amplitude 1.0. The ?-values are quantized into 4 bit
words. The quantization steps are given in table 1.
Table 1: The quantization of the gain parameters
Signalling values for
?c and ?d
Quantized amplitude ratios
?c and ?d
15 1.0
14 14/15
13 13/15
12 12/15
11 11/15
10 10/15
9 9/15
8 8/15
7 7/15
6 6/15
5 5/15
4 4/15
3 3/15
2 2/15
1 1/15
0 Switch off
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Release 4 9 3G TS 25.213 V4.2.0 (2001-12)
After the weighting, the stream of real-valued chips on the I- and Q-branches are then summed and treated as a
complex-valued stream of chips. This complex-valued signal is then scrambled by the complex-valued scrambling code
Sdpch,n. The scrambling code is applied aligned with the radio frames, i.e. the first scrambling chip corresponds to the
beginning of a radio frame.
4.2.2 PRACH
4.2.2.1 PRACH preamble part
The PRACH preamble part consists of a complex-valued code, described in section 4.3.3.
4.2.2.2 PRACH message part
Figure 2 illustrates the principle of the spreading and scrambling of the PRACH message part, consisting of data and
control parts. The binary control and data parts to be spread are represented by real-valued sequences, i.e. the binary
value “0” is mapped to the real value +1, while the binary value “1” is mapped to the real value –1. The control part is
spread to the chip rate by the channelization code cc
, while the data part is spread to the chip rate by the channelization
code cd.
? j c
cc
cd ?d
Sr-msg,n
I+jQ
PRACH message
control part
PRACH message
data part
Q
I
S
Figure 2: Spreading of PRACH message part
After channelization, the real-valued spread signals are weighted by gain factors, ?c for the control part and??d for the
data part. At every instant in time, at least one of the values ?c and ?d has the amplitude 1.0. The ?-values are quantized
into 4 bit words. The quantization steps are given in section 4.2.1.
After the weighting, the stream of real-valued chips on the I- and Q-branches are treated as a complex-valued stream of
chips. This complex-valued signal is then scrambled by the complex-valued scrambling code Sr-msg,n. The 10 ms
scrambling code is applied aligned with the 10 ms message part radio frames, i.e. the first scrambling chip corresponds
to the beginning of a message part radio frame.
4.2.3 PCPCH
4.2.3.1 PCPCH preamble part
The PCPCH preamble part consists of a complex-valued code, described in section 4.3.4.
4.2.3.2 PCPCH message part
Figure 3 illustrates the principle of the spreading of the PCPCH message part, consisting of data and control parts. The
binary control and data parts to be spread are represented by real-valued sequences, i.e. the binary value “0” is mapped
to the real value +1, while the binary value “1” is mapped to the real value –1. The control part is spread to the chip rate
by the channelization code cc
, while the data part is spread to the chip rate by the channelization code cd.
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Release 4 10 3G TS 25.213 V4.2.0 (2001-12)
? j c
cc
cd ?d
Sc-msg,n
I+jQ
PCPCH message
control part
PCPCH message
data part
Q
I
S
Figure 3: Spreading of PCPCH message part
After channelization, the real-valued spread signals are weighted by gain factors, ?c for the control part and??d for the
data part. At every instant in time, at least one of the values ?c and ?d has the amplitude 1.0. The ?-values are quantized
into 4 bit words. The quantization steps are given in section 4.2.1.
After the weighting, the stream of real-valued chips on the I- and Q-branches are treated as a complex-valued stream of
chips. This complex-valued signal is then scrambled by the complex-valued scrambling code Sc-msg,n. The 10 ms
scrambling code is applied aligned with the 10 ms message part radio frames, i.e. the first scrambling chip corresponds
to the beginning of a message part radio frame.
4.3 Code generation and allocation
4.3.1 Channelization codes
4.3.1.1 Code definition
The channelization codes of figure 1 are Orthogonal Variable Spreading Factor (OVSF) codes that preserve the
orthogonality between a user’s different physical channels. The OVSF codes can be defined using the code tree of
figure 4.
SF = 1 SF = 2 SF = 4
Cch,1,0 = (1)
Cch,2,0 = (1,1)
Cch,2,1 = (1,-1)
Cch,4,0 =(1,1,1,1)
Cch,4,1 = (1,1,-1,-1)
Cch,4,2 = (1,-1,1,-1)
Cch,4,3 = (1,-1,-1,1)
Figure 4: Code-tree for generation of Orthogonal Variable Spreading Factor (OVSF) codes
In figure 4, the channelization codes are uniquely described as Cch,SF,k, where SF is the spreading factor of the code and
k is the code number, 0 ? k ? SF-1.
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Release 4 11 3G TS 25.213 V4.2.0 (2001-12)
Each level in the code tree defines channelization codes of length SF, corresponding to a spreading factor of SF in
figure 4.

The leftmost value in each channelization code word corresponds to the chip transmitted first in time.
4.3.1.2 Code allocation for DPCCH/DPDCH
For the DPCCH and DPDCHs the following applies:
– The DPCCH is always spread by code cc = Cch,256,0.
– When only one DPDCH is to be transmitted, DPDCH1 is spread by code cd,1 = Cch,SF,k where SF is the spreading
factor of DPDCH1 and k= SF / 4.
– When more than one DPDCH is to be transmitted, all DPDCHs have spreading factors equal to 4. DPDCHn is
spread by the the code cd,n = Cch,4,k , where k = 1 if n ? {1, 2}, k = 3 if n ? {3, 4}, and k = 2 if n ? {5, 6}.
If a power control preamble is used to initialise a DCH, the channelisation code for the DPCCH during the power
control preamble shall be the same as that to be used afterwards.
4.3.1.3 Code allocation for PRACH message part
The preamble signature s, 0 ? s ? 15, points to one of the 16 nodes in the code-tree that corresponds to channelization
codes of length 16. The sub-tree below the specified node is used for spreading of the message part. The control part is
spread with the channelization code cc (as shown in section 4.2.2.2) of spreading factor 256 in the lowest branch of the
sub-tree, i.e. cc = Cch,256,m where m = 16?s + 15. The data part uses any of the channelization codes from spreading
factor 32 to 256 in the upper-most branch of the sub-tree. To be exact, the data part is spread by channelization code
cd = Cch,SF,m and SF is the spreading factor used for the data part and m = SF?s/16.
4.3.1.4 Code allocation for PCPCH message part
For the control part and data part the following applies:
– The control part is always spread by code cc=Cch,256,0.
– The data part is spread by code cd=Cch,SF,k where SF is the spreading factor of the data part and k=SF/4.
The data part may use the code from spreading factor 4 to 256. A UE is allowed to increase SF during the message
transmission on a frame by frame basis.
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Release 4 12 3G TS 25.213 V4.2.0 (2001-12)
4.3.1.5 Channelisation code for PCPCH power control preamble
The channelisation code for the PCPCH power control preamble is the same as that used for the control part of the
message part, as described in section 4.3.1.4 above.
4.3.2 Scrambling codes
4.3.2.1 General
All uplink physical channels are subjected to scrambling with a complex-valued scrambling code. The DPCCH/DPDCH
may be scrambled by either long or short scrambling codes, defined in section 4.3.2.4. The PRACH message part is
scrambled with a long scrambling code, defined in section 4.3.2.5. Also the PCPCH message part is scrambled with a
long scrambling code, defined in section 4.3.2.6.
There are 224 long and 224 short uplink scrambling codes. Uplink scrambling codes are assigned by higher layers.
The long scrambling code is built from constituent long sequences defined in section 4.3.2.2, while the constituent short
sequences used to build the short scrambling code are defined in section 4.3.2.3.
4.3.2.2 Long scrambling sequence
The long scrambling sequences clong,1,n and clong,2,n are constructed from position wise modulo 2 sum of 38400 chip
segments of two binary m-sequences generated by means of two generator polynomials of degree 25. Let x, and y be the
two m-sequences respectively. The x sequence is constructed using the primitive (over GF(2)) polynomial X
25+X3+1.
The y sequence is constructed using the polynomial X
25+X3+X2+X+1. The resulting sequences thus constitute
segments of a set of Gold sequences.
The sequence clong,2,n is a 16777232 chip shifted version of the sequence clong,1,n.
Let n23 … n0 be the 24 bit binary representation of the scrambling sequence number n with n0 being the least significant
bit. The x sequence depends on the chosen scrambling sequence number n and is denoted xn, in the sequel. Furthermore,
let xn(i) and y(i) denote the i:th symbol of the sequence xn and y, respectively.
The m-sequences xn and y are constructed as:
Initial conditions:
– xn(0)=n0 , xn(1)= n1 , … =xn(22)= n22 ,xn(23)= n23, xn(24)=1.
– y(0)=y(1)= … =y(23)= y(24)=1.
Recursive definition of subsequent symbols:
– xn(i+25) =xn(i+3) + xn(i) modulo 2, i=0,…, 225
-27.
– y(i+25) = y(i+3)+y(i+2) +y(i+1) +y(i) modulo 2, i=0,…, 225
-27.
Define the binary Gold sequence zn by:
– zn(i) = xn(i) + y(i) modulo 2, i = 0, 1, 2, …, 225
-2.
The real valued Gold sequence Zn is defined by:
0,1, ,2 2.
1 ( ) 1
1 ( ) 0
( )
2 5
? ?
?
?
?
? ?
? ?
? for i ?
if z i
if z i
Z i
n
n
n
Now, the real-valued long scrambling sequences clong,1,n and clong,2,n are defined as follows:
clong,1,n(i) = Zn(i), i = 0, 1, 2, …, 225
– 2 and
clong,2,n(i) = Zn((i + 16777232) modulo (225
– 1)), i = 0, 1, 2, …, 225
– 2.
Finally, the complex-valued long scrambling sequence Clong, n, is defined as:
3GPP
Release 4 13 3G TS 25.213 V4.2.0 (2001-12)
( ) ( )?1 ? 1? ?2? / 2??? , ,1, ,2,
C i c i j c i
long n
i
long n
? long n ? ?
where i = 0, 1, …, 225
– 2 and ?? denotes rounding to nearest lower integer.
clong,1,n
clong,2,n
MSB LSB
Figure 5: Configuration of uplink scrambling sequence generator
4.3.2.3 Short scrambling sequence
The short scrambling sequences cshort,1,n(i) and cshort,2,n(i) are defined from a sequence from the family of periodically
extended S(2) codes.
Let n23n22…n0 be the 24 bit binary representation of the code number n.
The n:th quaternary S(2) sequence zn(i), 0 ? n ? 16777215, is obtained by modulo 4 addition of three sequences, a
quaternary sequence a(i) and two binary sequences b(i) and d(i), where the initial loading of the three sequences is
determined from the code number n. The sequence zn(i) of length 255 is generated according to the following relation:
– zn(i) = a(i) + 2b(i) + 2d(i) modulo 4, i = 0, 1, …, 254;
where the quaternary sequence a(i) is generated recursively by the polynomial g0(x)= x
8+x5+3×3+x2+2x+1 as:
– a(0) = 2n0 + 1 modulo 4;
– a(i) = 2ni modulo 4, i = 1, 2, …, 7;
– a(i) = 3a(i-3) + a(i-5) + 3a(i-6) + 2a(i-7) + 3a(i-8) modulo 4, i = 8, 9, …, 254;
and the binary sequence b(i) is generated recursively by the polynomial g1(x)= x
8+x7+x5+x+1 as
b(i) = n8+i modulo 2, i = 0, 1, …, 7,
b(i) = b(i-1) + b(i-3) + b(i-7) + b(i-8) modulo 2, i = 8, 9, …, 254,
and the binary sequence d(i) is generated recursively by the polynomial g2(x)= x
8+x7+x5+x4+1 as:
d(i) = n16+i modulo 2, i = 0, 1, …, 7;
d(i) = d(i-1) + d(i-3) + d(i-4) + d(i-8) modulo 2, i = 8, 9, …, 254.
The sequence zn(i) is extended to length 256 chips by setting zn(255) = zn(0).
The mapping from zn(i) to the real-valued binary sequences cshort,1,n(i) and cshort,2,n(i), , i = 0, 1, …, 255 is defined in
Table 2.
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Release 4 14 3G TS 25.213 V4.2.0 (2001-12)
Table 2: Mapping from zn(i) to cshort,1,n(i) and cshort,2,n(i), i = 0, 1, …, 255
zn(i) cshort,1,n(i) cshort,2,n(i)
0 +1 +1
1 -1 +1
2 -1 -1
3 +1 -1
Finally, the complex-valued short scrambling sequence Cshort, n, is defined as:
( ) ( mod 256)?1 ? 1? ?2?? mod 256?/ 2??? , ,1, ,2,
C i c i j c i
short n
i
short n
? short n ? ?
where i = 0, 1, 2, … and ?? denotes rounding to nearest lower integer.
An implementation of the short scrambling sequence generator for the 255 chip sequence to be extended by one chip is
shown in Figure 6.
7 4 0
+ mod n addition
d(i)
6 5 3 2 1
2
mod 2
7 4 0
b(i)
6 5 3 2 1
2
mod 2
+
multiplication mod 4
zn
(i)
7 6 5 4 3 2 1 0
+
mod 4
Mapper
cshort,1,n(i)
a(i)
+ + +
+ + +
+ + +
3 3
3
2
cshort,2,n(i)
Figure 6: Uplink short scrambling sequence generator for 255 chip sequence
4.3.2.4 DPCCH/DPDCH scrambling code
The code used for scrambling of the uplink DPCCH/DPDCH may be of either long or short type. When the scrambling
code is formed, different consituent codes are used for the long and short type as defined below.
The n:th uplink scrambling code for DPCCH/DPDCH, denoted Sdpch, n, is defined as:
Sdpch,n(i) = Clong,n(i), i = 0, 1, …, 38399, when using long scrambling codes;
where the lowest index corresponds to the chip transmitted first in time and Clong,n is defined in section 4.3.2.2.
The n:th uplink scrambling code for DPCCH/DPDCH, denoted Sdpch, n, is defined as:
Sdpch,n(i) = Cshort,n(i), i = 0, 1, …, 38399, when using short scrambling codes;
where the lowest index corresponds to the chip transmitted first in time and Cshort,n is defined in section 4.3.2.3.
4.3.2.5 PRACH message part scrambling code
The scrambling code used for the PRACH message part is 10 ms long, and there are 8192 different PRACH scrambling
codes defined.
3GPP
Release 4 15 3G TS 25.213 V4.2.0 (2001-12)
The n:th PRACH message part scrambling code, denoted Sr-msg,n, where n = 0, 1, …, 8191, is based on the long
scrambling sequence and is defined as:
Sr-msg,n(i) = Clong,n(i + 4096), i = 0, 1, …, 38399
where the lowest index corresponds to the chip transmitted first in time and Clong,n is defined in section 4.3.2.2.
The message part scrambling code has a one-to-one correspondence to the scrambling code used for the preamble part.
For one PRACH, the same code number is used for both scrambling codes, i.e. if the PRACH preamble scrambling
code used is Sr-pre,m then the PRACH message part scrambling code is Sr-msg,m, where the number m is the same for both
codes.
4.3.2.6 PCPCH message part scrambling code
The set of scrambling codes used for the PCPCH message part are 10 ms long, cell-specific, and each scrambling code
has a one-to-one correspondence to the signature sequence and the access sub-channel used by the access preamble part.
Both long or short scrambling codes can be used to scramble the CPCH message part. There are 64 uplink scrambling
codes defined per cell and 32768 different PCPCH scrambling codes defined in the system.
The n:th PCPCH message part scrambling code, denoted Sc-msg,,n, where n =8192,8193, …,40959 is based on the
scrambling sequence and is defined as:
In the case when the long scrambling codes are used:
Sc-msg,n(i) = Clong,n(i ), i = 0, 1, …, 38399
where the lowest index corresponds to the chip transmitted first in time and Clong,n is defined in section 4.3.2.2.
In the case the short scrambling codes are used:
Sc-msg,n(i) = Cshort,n(i), i = 0, 1, …, 38399
The 32768 PCPCH scrambling codes are divided into 512 groups with 64 codes in each group. There is a one-to-one
correspondence between the group of PCPCH preamble scrambling codes in a cell and the primary scrambling code
used in the downlink of the cell. The k:th PCPCH scrambling code within the cell with downlink primary scrambling
code m, k =16,17,…, 79 and m = 0, 1, 2, …, 511, is Sc-msg, n as defined above with n = 64?m + k+8176.
4.3.2.7 PCPCH power control preamble scrambling code
The scrambling code for the PCPCH power control preamble is the same as for the PCPCH message part, as described
in section 4.3.2.6 above. The phase of the scrambling code shall be such that the end of the code is