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ECS643U/ECS720P Power Electronics
Coursework Examination 4
MATLAB/Simulink experiment for dc-dc converters
Deadline of the report submission: 01/12/2025
You MUST submit your answers within the deadline from the time the coursework being
released.
Instructions:
You can refer to textbooks, notes and online materials to facilitate your working, but
normal referencing and plagiarism rules apply, and you must cite any sources used (if
applicable). If any case of plagiarism and copying from other students, or from any other
resources have been detected by the teaching assistant or the module organiser, ‘0’ mark will
be allocated to the student without the organisation of any video viva.
Multiple submissions are not permitted, so be sure that you check your submission before
uploading it.
The use of Calculators and MATLAB software (any version) are permitted for this
examination.
Report:
Students are expected to answer Questions and Discussions (specified by blue colour) in the
submitted report. You must upload a single PDF document containing your solutions in the
QM+ portal under “Assessment Submission”.
Students are usually supposed to simulate multiple separate models in one course work.
Please include all your Simulink/Simscape models and MATLAB codes in the report in the
PDF document.
Marking:
The mark for this coursework is 25% of the total final mark for this module. The final mark
will be published in the QM+ page.
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ECS643U/ECS720P Power Electronics
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Coursework Objectives:
Open-loop synchronous buck converter model.
Closed-loop synchronous buck converter model with an analogue controller
Load transient model and simulations
Question 1 – open-loop buck dc-dc converter:
According to the lectures, the circuit diagram of a Buck Converter sub-system is as below.
The required circuit components:
= 4.1 , L = 80 Ω,
= 376 , C = 5 Ω, Ground
Input DC voltage: S = 100 ,
= 0.42 Current measurement
g = 12 Voltage measurement
: = 1 Ω Scope
Start MATLAB: (double-click on the MATLAB shortcut)
Open a file, in the MATLAB window menu:
Select file: buck_open_loop.mdl, then Open
This opens a preconfigured Simulink model for an open-loop synchronous buck
switching converter.
ECS643U/ECS720P Power Electronics
Check or adjust simulation parameters:
Simulation -> Simulation parameters
This opens a window to adjust simulation parameters such as Start Time, Stop Time, solver
options, step size, etc.
The default parameters and options are usually fine, except:
Enter appropriate Stop time (10ms in this example)
Enter Max step size of about 1/100 of the switching period (0.1μs in this example)
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ECS643U/ECS720P Power Electronics
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Question 1a – Include the scope output waveforms in the report. (VO and IL)
Question 1b – Change the duty cycle value (D) block, and fill in the Table 1:
Table 1
experiment
number
Duty cycle
value
Vo (in steady
state condition) Vo/Vin ratio
1 0.2
2 0.3
3 0.5
4 0.7
5 0.9
Question 1c – Explain why the Vo/Vin ratio is not identical to the expected ratio based on the
Duty cycle (D) parameter in a typical buck converter.
Note: Use formula as well as circuit analysis to address this question.
Inputs:
Input voltage g
Switching signal = {0,1}
Load current out
Outputs:
Output voltage o
Inductor current L
Question 1d – Based on the three main differential equations !
!#
“!
,
!
!#
$”
, % in buck converter
topology, complete the following diagram.
Hint: In a buck converter, there are three separate equations, by which the state space
equations of the converter is defined based on & and ‘ (state variables).
ECS643U/ECS720P Power Electronics
Question 2 – Closed-loop control of dc-dc buck converter:
In this step, the objective is to construct and simulate a closed-loop voltage regulator using a
simple continuous-time integral compensator.
Simulate the below circuit. Use the PWM and Buck converter block from the MATLAB
Simulink model provided in Question 1.
Set the compensator parameters (double click the block and edit the default values):
o Gain1 = 0.4 (gain H of the voltage divider sensing the output voltage)
o Gain2 = 1000 (gain of the integral compensator)
o Constant = 2 (constant Vref = 2 V, so that in steady-state Vo = Vref /H = 5V)
Question 2a – Include the output waveforms of Vo and IL.
Question 2b – Set the gain 2 parameters as the Table 2, and include the output voltage
waveforms in each experiment (Vo and IL)
Note: Rise time is defined as the time taken for a signal to cross its 90% steady state value.
(See picture below for better understanding)
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ECS643U/ECS720P Power Electronics
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Note: Overshoot percentage is defined as the ratio of maximum peak value of the response
waveform and the steady state value of the waveform.
Note: Settling time is the time required for an output to reach and remain within a given error
band following some input stimulus. In this course work, 2% of the steady state value is
considered as the error.
Table 2
experiment
number Gain2 value Vo Waveform Rise time (sec) Overshoot (%)
1 800
2 2000
3 3000
Question 2c – In a buck converter control system, the system output can have three types of
responses: Overdamped, underdamped, and critically damped. Specify the system response in
this regard in each experiment
Question 2d – [Discussion] in which of the responses, the system enters its steady state earlier
(do not confuse with rise time). In which state, the system is experiencing higher overshoot
value Is there any relationship between system agility and the overshoot percentage value
Discuss the advantages and disadvantageous of each of these three responses.
ECS643U/ECS720P Power Electronics
Question 3 – Step response of Buck dc-dc converter
In this question, the main objective is to investigate the behaviour of the buck converter
closed-loop control topology in some case studies with load transients.
Simulate the following model in Simulink. PWM and Buck converter block are the same as the
provided Simulink file for Question 1.
The objective is to set the parameters of the Step load pulse generator block to step the total
load resistance from 1Ω to 2Ω and back, corresponding to a load transient
Double click on the Step load block to open the Block Parameters window
Set Amplitude to 1, the Period to 2ms, and the Pulse Width to 50%
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ECS643U/ECS720P Power Electronics
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With these parameters, the Step load block periodically adds the resistance of 1Ω to the
constant load resistance of 1Ω. As a result, the total load resistance is 2Ω from 0 to 1ms, 1Ω
from 1ms to 2ms, back to 2Ω from 2ms to 3ms, etc.
Note: in this model, the step load change occurs instantaneously
Question 3a – Change the value of Gain2 block according to the Table 3. Report the required
parameters and waveforms in the table.
Table 3
experiment
number Gain2 value Vo waveform settling time
(sec) Overshoot (%)
1 800
2 2000
3 3000
Question 3b – Based on the obtained results in Question 3a, compare the step response of the
buck converter in the three modes of operation. In your comparison, include the performance
of the converter with criteria including 1) Settling time, 2) Rise time, and 3) Overshoot.
Question 3c – Consider a case in which the abovementioned buck converter is supposed to
supply a DC load. An important feature of the power supply for the load is supplying
converter able to provide a voltage in which the settling time of a load transient with value of
1 Ω is less than 0.3ms. Taking this into consideration, which of the compensator topologies,
as tested in Question 3a, can be used for this purpose Compare your selection in terms of the
rise time and overshoot.